GE to research radar processor open architecture for USAF
GE's Intelligent Platforms business was awarded a contract to undertake a six-month research programme to help the US Air Force (USAF) define radar processor open architectures. It announced the contract award on 24 March.
The research programme involves the benchmarking and optimisation of synthetic aperture radar and ground moving target indicator radar modes on multi-processor High Performance Embedded Computing (HPEC) systems.
These HPEC systems contain conventional CPUs and GPUs interconnected by high speed fabric. The programme will take place at GE's HPEC Center of Excellence in Billerica, Massachusetts.
Under the contract, GE's Intelligent Platforms will also develop a lab-based processor system with a clear path to rugged deployment on USAF platforms that embrace the open architecture approach based on industry standards and interface in both hardware and software.
David Tetley, HPEC systems engineering manager, GE Intelligent Platforms, said: 'This contract award acknowledges GE's experience and leadership in the development of HPEC solutions – including those using GPGPU technology - for the most demanding applications, and the application expertise with which we are able to support our customers.
'It is an exciting project to be working on as it will help create the radar processor architectures of the future and can have a significant bearing on the operational efficiency and effectiveness of the USAF in the years to come.'
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